In recent years, the development of a high density memory cell is being carried out. Particularly, a Dynamic Random Access Memories (DRAM) has been remarkably developed in terms of packing density and the DRAM is widely used in computer technology. Typically, the DRAM cells are applied to store data for a computer. Indeed, a memory cell is provided for each bit stored by the DRAM device. The cells must therefore be read and refreshed at periodic intervals. These memory cells have large capacitance for reading out and storing of information. Dynamic Random Access Memories are so named because their cells can retain information only temporarily, even with power continuously applied.
Each memory cell typically consists of a storage capacitor and an access transistor. The formation of a DRAM memory cell includes the formation of a transistor, a capacitor and contacts to external circuits. Generally speaking, the capacitors for DRAM are divided into two segments, those are a stacked capacitor and a trench capacitor. One of the prior arts in accordance with the trench capacitor can be seen "A 0.6 .mu.m.sup.2 256 Mb Trench DRAM Cell With Self-Aligned BuriEd STrap (BEST), L. Nesbit et al., 1993, IEEE, IEDM 93-627." A unique feature of this cell is a self-aligned buried strap which forms at the intersection of the storage trench and the junction of the array device. However, it is difficult to make deep trenches with a high aspect ratio for high density DRAMs. Further, another major concern of the trench capacitor is leakage current. As the trench size is reduced to sub micron range, the trench to trench punch through leakage is a serious issues for the DRAM cell. Other leakage, such as surface channel leakage between cells, gate-induced diode leakage, trench side wall diode leakage are also occur while the cell is scaled down. Thus, it is difficult to reduce the leakage current of the trench capacitor. See "SCALABILITY OF A TRENCH CAPACITOR CELL FOR 64 MBIT DRAM, B. W. Shen, et al., 1989, IEEE, IEDM 89-27."
In addition, one approach discloses that a polysilicon can be textured by wet oxidation and subsequent wet etching. The oxidation is enhanced at polysilicon grain boundaries, this method increases the effective area of a capacitor. Please see "Thin Nitride Films on Textured Polysilicon to Increase Multimegabit DRAM Cell Charge Capacitor, PIERRE C. FAZAN et al., 1990, IEEE." The present invention also uses a method to diffuse ions into silicon substrate. This method is proposed by V. Probst, see "Analysis of Polysilicon Diffusion Sources, V. Probst et al., J. Electrochem. Soc. SOLID-STATE SCIENCE AND TECHNOLOGY, Vol. 135, No. 3, p. 671."